AutoFab · Autonomous semiconductor engineering
From the first touchdown on test silicon, to the models every design depends on, to a verified circuit — three products on one data chain, and the loop closes every time the process moves.
01 · Measure AutoMeasure
Every curve checked against physics and its neighbours as it lands — a bad touchdown is caught, explained and re-measured on the spot.
02 · Model AutoPDK
Your extraction method, run as a plan: seven stages in physics order against real SPICE, every stage checked before it is accepted.
03 · Verify AutoCD
An 8-bit SAR ADC — capacitor DACs, comparator, SAR logic — generated, laid out DRC- and LVS-clean, and re-simulated with its parasitics.
AutoFab 04 · One wafer, one loop
Today that loop takes a quarter, three teams and three toolsets. With AutoFab it runs as one chain — in days, not a quarter.
measuredmodeledverified
01 The AutoFab products
Each stands on its own and fits the tools a fab already runs. Together they cover the life of a process, from the first measured wafer to production — and close the loop every time it moves.
die 01 · sweeping
01 · Measure
Autonomous measurement on the prober — an agentic layer on the lab you already run.
stage 1 of 7 · fitting
02 · Model
Compact-model extraction and PDK release — your method, run as a plan, every stage checked.
27 corners · re-verifying
03 · Verify
Autonomous circuit design — every corner, statistics, layout verified after extraction.
The three panels above are live illustrations drawn in your browser, not recordings.
02 One data chain
A node goes round this loop many times before v1.0 — and again after every tweak. Each turn used to cross three teams and three toolsets, with files passed between them. AutoFab runs it as one chain, with the evidence carried from step to step.
A process tweak, a new lot, a new node. The loop starts here.
Characterized on the prober, every curve checked as it is measured and re-measured on the spot.
AutoMeasureCompact models refitted in physics order, verified, and the PDK released.
AutoPDKThe designs built on the PDK re-simulated at every corner; what slipped is flagged and re-tuned.
AutoCDSigned off by the engineer, with the evidence of every step attached.
Today
a quarter
With AutoFab
days
03 What it gives back
04 Honest status
Autonomous extraction and PDK release, in the cloud or on your own hardware — the foundation the other two stand on.
Built with each fab: co-developed on the fab's own instruments and data, on-premises. Not an off-the-shelf download.
Proven end to end on two blocks on OpenPDK, with production-grade release targeted in the next 9–15 months.
The engineer sets the rules and signs off. AutoFab does the iteration.
→ autofab.ai
Measurement, models or design — tell us where your data chain loses the most time, and we'll show you the AutoFab product that takes it back.
AutoMeasure · Autonomous measurement for semiconductor labs and test floors
AutoMeasure is an agentic layer on top of the lab and test software you already run. Its agents check every curve the moment it lands — against device physics and against its neighboring devices — and re-measure on the spot. Clean, traceable data flows straight into modeling.
Today 01 · The measurement
Id–Vg, Id–Vd and C–V sweeps on every device, at each temperature in the plan. Nobody looks at most of them as they land. Nobody has time to.
Today 02 · The hand-off
The measurement is declared done. The data hasn't been checked yet — only collected.
Today 03 · The wait
Today 04 · The discovery
A bad probe contact. A noisy instrument. A sweep clipped at compliance. A probe card drifting across the wafer. Outliers nobody can explain.
Today 05 · The cost
Bad data is found at the worst possible moment — downstream, when it's too late.
01 The usual suspects
Each one looks like data. Each one, found weeks later, costs a re-measure the wafer may no longer be there for. Here is what each looks like — and what an agent says the second the sweep finishes.
Curves on this page are generated by a physics model of a bulk MOSFET with the artifacts injected — the same model that drives the live wafer below. Illustrative, not customer data. The reasoning is computed from each curve, not written by hand.
02 Timing is the product
The checks aren't new. Engineers already do them — by eye, weeks later, one file at a time. AutoMeasure runs them while the wafer is still under the probes, when a re-measure costs seconds instead of a slipped schedule.
Found weeks later
Found on the chuck
03 How it fits
04 What the agents do
Every curve, the moment it lands. Not a sample. Not at the end of the lot.
Against device physics — thermal limits, monotonicity, leakage, series resistance — and against the neighboring devices on the same wafer.
Every flag carries its reason, in device terms. Not a red cell.
On the spot, while the wafer is still on the chuck — re-probe or re-sweep, within rules your engineers set.
Every measurement carries its checks, its re-measurements and its provenance.
| die | Vth (V) | SS (mV/dec) | Ion ( | status |
|---|
05 Live · simulated wafer
A physics model behind every device, nine real checks computed from every curve, real decisions. Inject a fault, click any die to measure it next — and when the agent escalates, you're the engineer.
Click any die to measure it next
Starting the wafer. Every curve is checked the moment it lands.
The run continues on the rest of the wafer while this waits for you.
Simulated 300 mm characterization wafer: bulk NMOS test structures with realistic die-to-die variation. Device physics, checks and decisions run live in this page; nothing is pre-recorded and nothing leaves your browser.
06 Edge cases
Catching bad data is the easy half. The hard half is not throwing away good data — and knowing when to stop and ask.
07 Provenance
Checks, re-measurements and provenance travel with the data. It flows straight into modeling with nothing to clean by hand — and anyone, at any later stage, can see why each curve is there.
Flagged — probe contact. On-current 37% below 8 neighbors; subthreshold swing matched (80.7 vs 80.9 mV/dec). Series resistance at a probe contact, source or drain.
Re-probe and re-sweep. Rule: contact retry — set by your engineers. No limits changed.
9 / 9 checks passed. Vth within 0.2σ of neighbors. Attempt 1 retained and linked.
08 Where it goes
Thousands of curves per wafer, checked live.
Where every engagement startsWafer maps watched lot by lot. A parameter drifting out of its window is flagged with the exact devices and sites behind it.
As the checks prove themselvesAgents triage test data around the clock, separating a tester or probe-card issue from a real process shift — before anyone opens a ticket.
As the checks prove themselvesA real process shift triggers a model refit in AutoPDK and re-verification of the affected designs in AutoCD.
With AutoFab · AutoCD in development09 One data chain
Today that loop takes a quarter, three teams and three toolsets, with files passed between them. With AutoFab it runs as one chain — in days, not a quarter.
01 / 05
10 AutoFab · the autonomous fab
Each stands on its own. Together they take a fab from the first touchdown on test silicon to a verified design — and back again every time the process moves.
Autonomous measurement
Agents on top of the lab you already run: every curve checked against physics and its neighbors, re-measured on the chuck, delivered with its provenance.
Autonomous compact-model extraction & PDK release
Your extraction method, run as a plan: decks generated, stages fitted in physics order against real SPICE, every stage checked — nothing fitted before an engineer says go.
Autonomous circuit design
Circuits iterated across every corner, statistics in a virtual fab, DRC/LVS-clean layout verified post-layout — on the PDKs AutoPDK builds.
11 Where the time goes
A process node goes round the loop many times before v1.0 — and again after every tweak. Here is one turn of it, today and with AutoFab.
Mature-node PDK release, as published for AutoPDK: the ~2 months is mostly the ~8 weeks of characterization, which stays on the prober. The AutoMeasure figure is engineer time per measurement project, 40–70% depending on complexity. “Days, not a quarter” is the loop after a process change, once checked data is flowing. Modeling figures from hands-on extraction work and AutoPDK's internal benchmark; the AutoCD figure is a target for a product in development.
12 Conduct
Every flag is sorted: the measurement, the setup, or the silicon. Each needs a different response, and a different person.
Every flag is explained in device terms, with the curve and the checks behind it — the passed ones as well as the failed ones.
To the engineer, with the evidence attached, whenever a decision isn't the agent's to make. The run keeps going while it waits.
And one rule above the rest: never silently change a limit.
13 Honest status
AutoMeasure is co-developed on your own instruments and your own data. It starts with your characterization flow and extends into parametric and production test as the checks prove themselves. It runs on-premises. It is not an off-the-shelf download, and we don't pretend it is.
Your instruments, your probers, your software, your device types. We map the flow and the checks your engineers already trust before the agents touch anything.
Physics and neighbor checks tuned to your devices. Re-measure and escalation rules set by your engineers, and no one else.
Into WAT, PCM and production test, one stage at a time, as each check earns its place on real lots.
Connect clean, traceable data to AutoPDK for the refit — and to AutoCD for re-verification as it arrives.
14 Questions engineers ask
No. AutoMeasure is a layer on top of what you already run. Your software keeps executing the sweeps; the agents read every result as it's written and act through that same software when a re-measure is needed. Zero changes to the existing setup.
Any vendor. Because it works through the lab and test software you already use, it isn't tied to a particular instrument, prober or tester.
No. AutoMeasure runs on-premises. The data never has to leave the fab.
A suspicious die is re-probed or re-swept immediately, while the wafer is still on the chuck — not discovered weeks later. What the agents may do on their own is set by your engineers, test by test. Every attempt is kept and linked in the record.
Never silently. If a better range or limit would help — a sweep clipped at compliance, for example — the proposal goes to the engineer with the evidence attached, and nothing changes until they approve.
No. An outlier is re-measured. If the answer holds, it's the device, not the measurement — kept, labeled and handed to modeling as a real outlier. Nothing is deleted; failed attempts stay linked to the ones that replaced them.
It escalates instead of guessing. The engineer gets the curve, the checks that failed, the checks that passed, and a plain statement of what the agent doesn't know. The rest of the wafer keeps running while it waits.
A damaged device is a case for escalation, not a retry. When a sweep shows the device itself has failed — an oxide breakdown, for example — the agents stop stressing it, record it as a device failure and ask the engineer what to do next.
By where the pattern lives. Failures that repeat with the probe-card footprint or follow probing order point at the setup; a signature that crosses cards, testers and lots points at the process. The triage comes with the maps and the devices behind it, before anyone opens a ticket.
No, and we don't pretend it is. AutoMeasure is built with each fab — co-developed on your instruments and data, starting with your characterization flow and extending into parametric and production test as the checks prove themselves.
No. Clean, traceable data helps any modeling flow. Together with AutoPDK and AutoCD it closes the loop: a real process shift triggers a model refit and re-verification of the affected designs.
40 to 70 percent less engineer time per measurement project, depending on complexity. The bigger effect is on the schedule: bad data stops surfacing weeks later, at extraction, when the wafer is gone.
→ Early access
AutoMeasure is in early access, built with each fab. Tell us about your devices, your instruments and how your test flow runs today — we'll show you where the agents would sit, and what they would check first.
AutoPDK · Autonomous compact-model extraction and PDK release · Ready today
From measured wafer data to a PDK-ready model card in under an hour. Real physics, real SPICE — the AI does the orchestration, your engineers make the decisions.
Today 01 · Where the months go
Characterize: thousands of curves, about eight weeks. Model: dozens of devices, hundreds of parameters, two to three months. Release: corners, statistics, QA, versions. No PDK, no customers.
Today 02 · The loop
v0.1 on first silicon. v0.5 when the process is tuned: refit everything. v0.9: refit again, add statistics. v1.0 — and every tweak after that. One node, five releases, and today each one is a quarter of work.
Today 03 · The bottleneck
Which device first, which parameters, which bounds, in what order. When that expert is busy, the release waits — and every chip on the node waits with it.
AutoPDK 04 · The method becomes the asset
Decks generated, stages fitted in physics order against real SPICE, every stage checked — and nothing fitted before an engineer says go.
02 How it works
measured starting card model, fitting
03 Live · in your browser
A real fit, running right here: four device geometries, two temperatures, Id–Vg, Id–Vd and C–V — 645 measured points, seven stages in physics order. Choose how much autonomy to hand over, then press go — or take the wheel yourself.
Every stage is re-simulated independently from the card before it turns ink; the final check uses data the fit never saw.
The engine runs the whole plan, scores every stage and stops only if the verifier disagrees.
In-browser demonstration: a simplified compact model (14 parameters) fitted by Levenberg–Marquardt to synthetic measurements with noise. AutoPDK itself fits full CMC models — BSIM4, PSP, BSIM-CMG, HICUM and more — against real SPICE, on your data, with your method.
04 The record run · internal benchmark
A full production-style dataset — every geometry corner, three temperatures, body bias and C–V — taken from raw wafer data to a verified, sign-off-ready BSIM4 card, fully autonomously. The same flow usually books days of an expert's calendar.
The engine surveys corners, temperatures and coverage on its own.
Every simulation deck generated; a corners-first plan.
Stage by stage against true SPICE, each scored before it is accepted.
Overlays across every corner, plus an independent check.
Finished model card with lineage, and a sign-off report.
Overlays · every cornerwaiting for data
Illustrative: the in-browser demo device, its card converging stage by stage and then checked device by device — Id–Vg at Vd 50 mV and 1.8 V. The record run itself used a full production dataset.
05 The autonomy dial
The same engine drives all three — hand it the keys, gate every step, or take the wheel yourself. Switch at any time, mid-extraction.
Autonomous
Drop in measurements. The engine surveys the data, generates the decks, builds a corners-first extraction plan, fits stage by stage, self-verifies against quality gates and publishes the report.
Gated
Plan-first by design: every stage — devices, diagrams, parameters, bounds — is proposed, and nothing fits until you say go. Intervene anywhere, then let it continue.
Hands-on
Don't want AI making modeling decisions? Use it as the fastest operator you've ever had: it does the chores — setup, netlists, simulations, plots, reports — and touches nothing you didn't ask for.
06 What makes it different
Every deck — DC and C–V, every device, bias and temperature — generated from your measurements: instance line, sources, sweeps, temperature, model loading, convergence aids. You never author a test setup.
Describe your extraction flow once, in plain language. It becomes a plan the engine follows on every new technology — your playbook, not ours, unless you want ours.
34+ compact models ready to run, compiled to native code from the Verilog-A your PDK already ships — and any other Verilog-A model on request. One engine for all of them.
Point it at a full PDK library; only the model that needs re-extraction changes. Everything else stays byte for byte.
Drop in last year's report or describe what you want — every run produces a sign-off report in that template, with live charts grounded in the actual simulations.
Every card versioned with full lineage. An independent check must agree, or the stage stays red. Runs on-premises or in the cloud.
07 Model library
Compiled and simulated natively in true SPICE — the exact model code your PDK ships. 34+ industry standards come precompiled; adding another is a drop-in, not a product release you wait for. Your golden simulator is integrated on request, so the card you sign off is verified where you actually simulate.
Characteristic curves sketched for each device family — illustrative shapes, not fitted data.
08 Reports
Every extraction produces sign-off reports with live charts — grounded in the actual simulation data, and blunt about what isn't good enough yet. A bad starting card is called a bad starting card; a fit that regressed a metric is shown, not smoothed over.
Starting card (dashed) against measured points — before any fitting.
The same devices after the plan — from the in-browser fit above.
09 WAT / PCM analysis
Parametric test data usually dies in spreadsheets. Drop a folder of WAT/PCM exports on AutoPDK — as they come from the tester, mixed lots and all — and get wafer maps, parameter trends and lot-to-lot comparisons immediately. Then ask for any plot you can describe.
Tester exports parsed as-is, grouped by lot, wafer, site and parameter — mixed lots, split files and inconsistent naming untangled.
That sentence is the plot spec: wafer maps, box plots, drift charts and site drill-downs — interactively or through the API.
PCM statistics live beside your compact models — one platform for watching the process and modeling the devices.
10 Deployment & AI
Measurement data is fab-confidential. AutoPDK runs where your data lives — and the intelligence layer is yours to choose.
Hosted AutoPDK with everything included. Push measurements over a REST API, stream extraction progress live, pull model cards and reports.
The entire platform — extraction engine, SPICE farm, assistant, database — ships as containers and runs on your hardware, inside your network.
Our hosted models, your enterprise AI gateway, or a fully local model — and two together: one drives the extraction while a second independently verifies it.
# your local AI MODEL_BASE_URL=http://127.0.0.1:8000/v1 # your gateway MODEL_BASE_URL=https://your-gateway/v1
Agent-native by design: the whole platform is exposed as tools, so your own agents, scripts and design flows can drive extractions, simulations and reports programmatically.
11 Where AutoPDK goes next
A production PDK is more than one typical model. The next versions carry the same autonomous, physics-driven extraction into the corners, the statistics and the aging a design team signs off against.
Corner cards from measured spread; local and global variation extracted from wafer and lot data into a Monte Carlo-ready model — mismatch, process and temperature — with the same stage-by-stage checks.
Aging extracted from stress measurements — bias-temperature instability, hot-carrier degradation, time-dependent dielectric breakdown — as reliability models and aging-aware corners.
Measured S-parameters fitted against the same compact models, extending the kit to RF and high-speed devices without a second toolset.
Roadmap items are in development; AutoPDK's nominal extraction, library updates and reports are available today. Roadmap plots are illustrative.
12 What it gives back
back on every PDK release — about five months becomes about two, with characterization unchanged.
of modeling per release, down from two to three months of expert extraction.
where modeling often took several — reviewing and deciding, not scripting.
The method stays yours. The months come back.
Mature-node PDK release. Modeling times from hands-on extraction experience; characterization time unchanged. “Under an hour per card” is AutoPDK's internal benchmark.
13 Who it is for
A first PDK, then a release every few weeks while the process settles — without a modeling department to match.
Every node loops measure → model → release many times before v1.0. Each loop gets shorter.
GaN, SiC, RF and power processes with their own compact models — any standard model, one engine.
Models you can trust for your corners, and designs re-verified the moment the PDK moves.
→ Ready today · early access open
Early-access teams get a working instance — on our cloud or on your hardware — and an engineer who runs the first extraction with them. Bring your data and your methodology; send the report template your QA already accepts.
AutoCD · Autonomous circuit design · In development
AutoCD iterates the circuit, simulates every corner, runs the statistics in a virtual fab and finalizes schematic and layout — DRC- and LVS-clean, verified after layout — on the PDKs AutoPDK builds. The designer sets the spec and signs off.
Today 01 · The PDK moved
Every one of them has to be re-simulated at every corner. Some have to be re-laid-out. Who does it — and how long does the tape-out wait?
Today 02 · The hand work
Corners, statistics, layout, parasitics, sign-off — repeated by hand on blocks that worked last release, every time the process moves.
AutoCD 03 · The loop as a flow
Generated layout, DRC- and LVS-clean, symmetry where the circuit needs it — and the extracted parasitics go straight back into simulation.
AutoCD 04 · The designer decides
It stops for approval wherever the designer wants one — and it does not take the decision.
02 The flow
03 Live · a new PDK lands
A model card is a trigger, not a project. Release a new PDK version to the 1 GS/s track-and-hold below: all 27 process, voltage and temperature corners re-simulate, the ones that slip are flagged, the block is re-tuned and re-verified — and the designer signs off.
On PDK v0.5 the block meets spec at all 27 corners. Release a new PDK version to see what happens when the models move.
Illustrative: a behavioral model of the published 1 GS/s track-and-hold across corners, with a hypothetical model update. The real flow runs real simulators and sign-off decks on the actual netlist and layout. The published block meets ≥ 60 dB SFDR at all 27 corners.
04 Chips it has built
To prove the flow end to end, two classic mixed-signal blocks went all the way from specification to a DRC- and LVS-clean layout, then were re-simulated with the extracted parasitics. The figures are post-layout results, not schematic estimates.
Chip 1 · OpenPDK · CMOS
Capacitive DAC, dynamic comparator and SAR logic, generated, placed, routed and verified as one block at 1.8 V.
Chip 2 · OpenPDK · SiGe BiCMOS
A bipolar front end for high-speed data converters, verified with the PDK's own sign-off decks and checked across 27 process, voltage and temperature corners.
Both blocks were designed with the AutoCD flow on publicly available OpenPDKs; typical-corner figures unless stated. They demonstrate the flow; they are not taped-out products. The spectra and linearity plots on this page are rendered from behavioral models tuned to the published post-layout results.
05 Built on AutoPDK
AutoCD runs on the PDKs AutoPDK generates. When the process moves, AutoPDK refits the models and AutoCD re-verifies every design against them — the same data chain, from test silicon to a verified circuit.
Models, corners and statistics come straight from the PDK release — no copy that drifts out of date between the modeling team and the design team.
A new model card is a trigger, not a project: the affected blocks are re-simulated across corners and flagged if they no longer meet spec.
The engineer sets the spec, approves each step if they wish, and signs off. AutoCD does the iteration; it does not take the decision.
Change → Measure → Model → Verify → Release: AutoMeasure, AutoPDK and AutoCD as one loop that runs in days, not a quarter.
06 Honest status
AutoPDK — autonomous extraction and PDK release, the foundation AutoCD stands on.
AutoCD, with production-grade release targeted in the next 9–15 months. The flow has been proven end to end on two blocks on OpenPDK.
Design teams who want AutoCD on their process can talk to us now — and decide what it does first.
The designer sets the spec and signs off. AutoCD does the iteration.
→ In development · shape it with us
Tell us the blocks you re-verify on every PDK update. We'll show you the flow on OpenPDK — and talk about yours.